#ifndef _DRV_PCIE_H_
#define _DRV_PCIE_H_

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <fcntl.h>
#include <linux/ioctl.h>
#include "common.h"

#define XBMD_CTL_TYPE 	       'O'

#define INITCARD              _IOW(XBMD_CTL_TYPE,0x10, unsigned int)  // Initailizes XBMD board
#define INITRST               _IOW(XBMD_CTL_TYPE,0x11, unsigned int)  //  Resets XBMD board
#define WRDDMACR              _IOW(XBMD_CTL_TYPE,0x12, unsigned int)  // Write: DMA Control Status Register閿涳拷 bit0=1 閺冩儼銆冪粈鐑樻緲閸楊搳MA閸愭瑦鎼锋担婊愮礉bit0=0 閺冩儼銆冪粈鐑樻緲閸楊搳MA鐠囩粯鎼锋担锟?
#define WRDDMAST              _IOW(XBMD_CTL_TYPE,0x13, unsigned int)  // Write: DMA Control Enable Register閿涳拷 bit0=1 閺冭泛鎳℃禒銈夋敚鐎涳拷
#define WRWDMATLPS            _IOW(XBMD_CTL_TYPE,0x14, unsigned int)  // Write: Write DMA TLP Size Register, 閸楁洑缍匘W
#define USR_DMA_END           _IOW(XBMD_CTL_TYPE,0x15, unsigned int)  // Write: USER DMA END
#define USR_ID_UP             _IOW(XBMD_CTL_TYPE,0x16, unsigned int)  // Write: USER ID UPDATA
#define DMASTATUS             _IOR(XBMD_CTL_TYPE,0x17, unsigned int)  // READ:  DMA STATUS 


#define RDDMAWRTLPCLKN        _IOR(XBMD_CTL_TYPE,0x18, unsigned int)  // READ: DMA WRITE TLP CLK NUMBER
#define RDDMARDTLPCLKN        _IOR(XBMD_CTL_TYPE,0x19, unsigned int)  // READ: DMA READ TLP CLK NUMBER
#define FPGAVERSION           _IOR(XBMD_CTL_TYPE,0x1a, unsigned int)  // READ: FPGA VERSION


#define ID_NUM               _IOR(XBMD_CTL_TYPE,0x1b, unsigned int)  // READ: chan ID

#define FPGA_VER_RDREG                  0
#define DMAWR_CLKNUM_RDREG              1
#define DMARD_CLKNUM_RDREG              2
#define USR_DMAEND_RDREG                3

#define DIS_DMA_TRANS                   0x4


void init_pcie();
int set_stop_signal();
int get_pcieData(uint8 *buff, long len);
#endif /* DMATEST_H_ */
